Physical standard of interface characteristics for mounting
memory onto any host device in a 3D configuration. Includes a system of pin
definitions, specifying locations and order, made as generic as possible in
order to cover a wide range of implementations; also includes a set of surface
preparation requirements to cover various categories of bonding methods.
Revision 1.0, 1 June
2008, 657 KB (Adobe "pdf" format)
Press Release,
July 2008 (Adobe "pdf" format)
EE
Times, Semiconductor
International, ChipCrunch
© 2008 3D-IC Alliance. All rights reserved. Revised: July 30, 2008
